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Last updated April 2026. Download the full PDF above.

General Information

Full Name Kemal Derya
Email kderya@wpi.edu
Location Worcester, MA, USA
Languages English, Turkish

Research Interests

  • Primary: Trustworthy AI & LLM Safety, Hardware Security
  • Secondary: Microarchitectural Side Channels, Fault Injection, Post-Quantum Cryptography

Education

  • 2022 - Present
    Ph.D. Candidate in Electrical and Computer Engineering
    Worcester Polytechnic Institute, Worcester, MA
    • Advised by Prof. Berk Sunar in the Vernam Lab
    • Research areas: LLM alignment & guard-model robustness, Rowhammer-based fault attacks, transient-execution vulnerabilities
  • 2020 - 2022
    M.S. in Electronics Engineering
    Sabanci University, Istanbul, Turkey
    • GPA: 3.85/4.00
    • Thesis: FPGA-based hardware accelerators for lattice-based post-quantum cryptography
  • 2014 - 2019
    B.S. in Electronics Engineering
    Sabanci University, Istanbul, Turkey
    • GPA: 3.67/4.00 (with Tuition Fee Scholarship)

Professional Experience

  • Jan - Aug 2025
    System Engineer Intern
    Analog Devices Inc., Boston, MA
    • Built automated scripts to ensure ASPICE System Engineering compliance across the team's system projects
    • Developed tooling to verify system requirements and specifications against internal guidelines
    • Built a GitHub CI/CD pipeline that automates ASPICE compliance checks and flags non-conformant requirements at each system level
  • 2022
    Digital Design Engineer
    PAVOTEK, Istanbul, Turkey
    • Developed digital systems for defense applications with strict reliability requirements
    • Implemented GSM protocol logic in Verilog using MATLAB Simulink model-based design
    • Delivered high-performance digital hardware solutions on Zynq SoC platforms

Publications & Preprints

  • 2026
    ★ Revisiting JBShield: Breaking and Rebuilding Representation-Level Jailbreak Defenses
    Derya, K. and Sunar, B.
    • arXiv preprint arXiv:2605.03095
  • 2025
    Super Suffixes: Bypassing Text Generation Alignment and Guard Models Simultaneously
    Adiletta, A., Adiletta, K., Derya, K. and Sunar, B.
    • arXiv preprint arXiv:2512.11783
  • 2025
    μRL: Discovering Transient Execution Vulnerabilities Using Reinforcement Learning
    Tol, M.C., Derya, K. and Sunar, B.
    • arXiv preprint arXiv:2502.14307
  • 2025
    ★ FAULT+PROBE: A Generic Rowhammer-based Bit Recovery Attack
    Derya, K., Tol, M.C. and Sunar, B.
    • Proc. 2025 ACM Asia Conference on Computer and Communications Security (AsiaCCS), Hanoi, Vietnam
    • doi: 10.1145/3708821.3733868
  • 2025
    LeapFrog: The Rowhammer Instruction Skip Attack
    Adiletta, A., Tol, M.C., Derya, K., Sunar, B. and Islam, S.
    • 2025 IEEE European Symposium on Security and Privacy (EuroS&P)
  • 2025
    Non-Halting Queries: Exploiting Fixed Points in LLMs
    Hammouri, G., Derya, K. and Sunar, B.
    • 2025 IEEE Conference on Secure and Trustworthy Machine Learning (SaTML), Copenhagen, Denmark
    • pp. 1-22, doi: 10.1109/SaTML64287.2025.00009
  • 2022
    ★ CoHA-NTT: A Configurable Hardware Accelerator for NTT-based Polynomial Multiplication
    Derya, K., Mert, A.C., Öztürk, E. and Savaş, E.
    • Microprocessors and Microsystems, Volume 89, 104451
    • ISSN 0141-9331, doi: 10.1016/j.micpro.2022.104451
  • 2022
    ★ Accelerating Lattice-based Cryptosystems
    Derya, K.
    • M.S. Thesis, Sabancı University

Conference Presentations

  • Aug 2025
    FAULT+PROBE: A Generic Rowhammer-based Bit Recovery Attack
    AsiaCCS 2025, Hanoi, Vietnam

Vulnerability Disclosures

  • CVE-2024-5288 — wolfSSL. Rowhammer-based bit-recovery attack on fault-protected ECDSA in the TLS 1.3 handshake (disclosed as part of FAULT+PROBE).

Professional Service

  • Reviewer, IEEE Transactions on Circuits and Systems II: Express Briefs

Teaching Experience

  • Worcester Polytechnic Institute
    • ECE 3829 — Advanced Digital System Design with FPGAs
    • ECE 2049 — Embedded Computing in Engineering Design
  • Sabanci University
    • CS 303 — Logic and Digital System Design
    • EE 308 — Microprocessor-Based System Design

Skills

  • Research Areas
    • AI Safety & LLM Alignment, Hardware Security, Post-Quantum Cryptography
  • Programming
    • C, C++, Python, Verilog, Bash
  • ML / AI Frameworks
    • PyTorch, TensorFlow, HuggingFace Transformers
  • Hardware / EDA
    • FPGA (Xilinx Vivado), ASIC, SystemVerilog, MATLAB / Simulink

Selected Projects

  • 2025
    Adversarial Suffixes Against LLM Guard Models
    • Developed universal adversarial suffixes that jointly bypass alignment and Llama Prompt Guard 2 across five models
    • Proposed DeltaGuard, a lightweight residual-stream detector reaching near-100% malicious-prompt classification
  • 2025
    Non-Halting LLM Queries via Fixed-Point Exploitation
    • Discovered a vulnerability where carefully crafted queries drive aligned LLMs into non-terminating output
    • Evaluated across GPT-4o, Llama, and Gemini Pro 1.5 — 97% success rate on GPT-4o
  • 2025
    RL-driven Transient Execution Vulnerability Discovery
    • Built a reinforcement-learning framework that automates attack synthesis for microarchitectural leakage discovery on Intel CPUs
  • 2025
    Rowhammer Instruction Skip Attack
    • Introduced a new class of Rowhammer gadget that flips stack-stored return addresses to bypass security-critical code paths
  • 2024
    Rowhammer DRAM Profiling for Secret Key Extraction
    • Profiled DRAM to recover 256-bit ECDSA session keys from wolfSSL's TLS 1.3 handshake
    • Disclosed as CVE-2024-5288
  • 2022
    Accelerating Lattice-based PQC Schemes
    • Designed and implemented NTT-based polynomial-multiplier hardware on FPGA
    • Delivered run-time and compile-time configurability for multiple PQC schemes